41 research outputs found

    Reducing MOSFET 1/f Noise and Power Consumption by 'switched biasing'

    Get PDF
    "Switched Biasing" is proposed as a new circuit technique that exploits an intriguing physical effect: cycling a MOS transistor between strong inversion and accumulation reduces its intrinsic 1/f noise. The technique is implemented in a 0.8”m CMOS sawtooth oscillator by periodically off-switching of the bias currents during time intervals that they are not contributing to the circuit operation. Measurements show a reduction of the 1/f noise induced phase noise by more than 8 dB, while the power consumption is reduced by more than 30% as well

    Modeling of RTS noise in MOSFETs under steady-state and large-signal excitation

    Get PDF
    The behavior of RTS noise in MOSFETs under large-signal excitation is experimentally studied. Our measurements show a significant transient effect, in line with earlier reports. We present a new physical model to describe this transient behavior and to predict RTS noise in MOSFETs under large-signal excitation. With only three model parameters the behavior is well described, contrary to existing models

    Reduction of the 1/f Noise Induced Phase Noise in a CMOS Ring Oscillator by Increasing the Amplitude of Oscillation

    Get PDF
    Spectrum measurement results of a CMOS ring oscillator are presented that show a 10 dB decrease in 1/f noise induced phase noise at a 2 dB increase in carrier power. Simple ring oscillator theory predicts that the 1/f noise induced phase noise is independent of carrier power. It is shown that an increase in the amplitude of oscillation is accompanied by a reduction of the intrinsic 1/f noise of the periodically switched MOS transistors in the ring. A net reduction of the 1/f noise of a periodically switched NMOS transistor of more than 12 dB is measured in the baseban

    A Robust 43-GHz VCO in CMOS for OC-768 SONET Applications

    Get PDF
    In this paper, we present a 43-GHz LC-VCO in 0.13-/spl mu/m CMOS for use in SONET OC-768 optical networks. A tuned output buffer is used to provide 1.3 V/sub p-p/ (single-ended) into a 90-fF capacitive load as is required when the VCO is used in typical clock and data recovery (CDR) circuits. Phase noise is -90 dBc/Hz at a 1-MHz offset from the carrier; this meets SONET jitter specifications. The design has a tune range of 4.2%. The VCO, including output buffers, consumes 14 mA from a 1-V supply and occupies 0.06 mm/sup 2/ of die area. Modern CMOS process characteristics and the high center frequency of this design mean that the tank loss is not dominated by the integrated inductor, but rather by the tank capacitance. An area-efficient inductor design that does not require any optimization is used

    Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators

    Get PDF
    This paper gives experimental proof of an intriguing physical effect: periodic on-off switching of MOS transistors in a CMOS ring oscillator reduces their intrinsic 1/f noise and hence the oscillator's close-in phase noise. More specifically, it is shown that the 1/f3 phase noise is dependent on the gate-source voltage of the MOS transistors in the off state. Measurement results, corrected for waveform-dependent upconversion and effective bias, show an 8-dB-lower 1/f3 phase noise than expected. It will be shown that this can be attributed to the intrinsic 1/f noise reduction effect due to periodic on-off switchin

    Vermindering gebruik chemische gewasbeschermingsmiddelen bij bestrijding van emelten en rouwvlieglarven op grasland

    Get PDF
    In dit rapport worden de onderzoeksresultaten met betrekking tot het verbruik van insecticiden beschreven. Op grasland worden met name emelten en rouwvlieglarven bestreden. Het rapport richt zich vooral op schade door emelten. De gevonden aantallen rouwvlieglarven in de proeven waren te klein om gericht onderzoek naar te doen

    Fitting the integrated Spectral Energy Distributions of Galaxies

    Full text link
    Fitting the spectral energy distributions (SEDs) of galaxies is an almost universally used technique that has matured significantly in the last decade. Model predictions and fitting procedures have improved significantly over this time, attempting to keep up with the vastly increased volume and quality of available data. We review here the field of SED fitting, describing the modelling of ultraviolet to infrared galaxy SEDs, the creation of multiwavelength data sets, and the methods used to fit model SEDs to observed galaxy data sets. We touch upon the achievements and challenges in the major ingredients of SED fitting, with a special emphasis on describing the interplay between the quality of the available data, the quality of the available models, and the best fitting technique to use in order to obtain a realistic measurement as well as realistic uncertainties. We conclude that SED fitting can be used effectively to derive a range of physical properties of galaxies, such as redshift, stellar masses, star formation rates, dust masses, and metallicities, with care taken not to over-interpret the available data. Yet there still exist many issues such as estimating the age of the oldest stars in a galaxy, finer details ofdust properties and dust-star geometry, and the influences of poorly understood, luminous stellar types and phases. The challenge for the coming years will be to improve both the models and the observational data sets to resolve these uncertainties. The present review will be made available on an interactive, moderated web page (sedfitting.org), where the community can access and change the text. The intention is to expand the text and keep it up to date over the coming years.Comment: 54 pages, 26 figures, Accepted for publication in Astrophysics & Space Scienc

    Studeerbaarder? Moeilijker!

    Get PDF
    corecore